1. Technical Field
Embodiments generally relate to electronic circuits, and more specifically to the forming of a counter of events or transactions in an electronic circuit non-volatile memory.
2. Discussion of the Related Art
Event counters having their value stored in a non-volatile memory are more and more frequent in electronic circuits. Such counters count and store in non-volatile fashion a number of events or transactions.
An example is the counting of a number of uses of a function or of an application. It may also be a time counter intended to count and to store the duration of use of an application of a medium, of a circuit, etc. It may also be a counter guaranteeing the uniqueness of the data in the case of a cryptographic function.
Counters formed in non-volatile memory, that is, having their counter bits directly formed of non-volatile memory cells, are here distinguished from memory areas storing the results of a calculation (or of a counter formed in volatile memory), for which the recording to the result is only performed when this result needs to be stored in a non-volatile memory. The embodiments described herein are directed to counters of the first category, that is, counters formed in non-volatile memory.
The counters targeted by the embodiments which will be described are counters incremented by a relatively low step with respect to the counter value, typically by an increment ranging between 1 and 8.
A problem encountered in counters of this type formed in non-volatile memory is linked to the limited lifetime of the storage cells in terms of number of write operations. Indeed, non-volatile memory cells of EEPROM or FLASH type have a wearing effect. Typically, an EEPROM cell withstands on the order of 500,000 write cycles.
To form a counter capable of counting a number of transactions greater than this endurance, more non-volatile memory cells than the theoretically required number have to be used. In particular, for each increment (assuming an increment by one unit), many of the bits or at least the least significant bit which changes value for each transaction have to be written. For example, a counter capable of counting up to 2 million is theoretically performed over three bytes (often plus one byte for a CRC calculation). In practice, four times as much room is requested, the counter being transferred towards four other memory bytes each time the theoretical maximum number of write cycles has been reached.